IQ Intel · Quantum Referee
New sealed resultExact, no-truncation coherent execution demonstrated through 96 qubits on structured lattice-local logical-circuit classes — read the announcement.

Independent quantum computation validation

Do not ask whether the result looks right. Ask whether the evidence supports the computation.

IQ Intel Quantum Referee independently validates eligible quantum circuits, transformed circuits, hardware outputs, mitigation workflows, and state-level claims under a protocol frozen before grading. Exact, no-truncation coherent execution has now been demonstrated, sealed, and reproduced through 96 qubits on structured lattice-local logical-circuit classes — extending the earlier 40-qubit structured frontier.

Find the right validation route Review sealed evidence
96Q
Structured lattice-local logical-circuit classes, exact coherent, sealed
87
Official envelope instances
26/26
Circuit-equivalence classifications
35
Sealed mitigation cells

Announcement · Sealed 2026-08-30

The exact coherent frontier now stands at 96 qubits on structured lattice-local logical-circuit classes.

“Exact, no-truncation coherent execution demonstrated through 96 qubits on structured lattice-local logical-circuit classes: structured IQP (lattice-local diagonal), transversal Clifford blocks, CNOT-ladder Pauli-rotation blocks, mirror/uncompute, and Trotterized structured dynamics (TFIM-class), as sealed.”

Pre-registered before execution · every rung independently cross-referenced · every executed instance run twice with bit-identical records · full REPRODUCTION from the sealed package, byte-for-byte · study seal bbc909416b150c83999ac560bcd157cab2d02232a78d28c9d2f01f863e3ec106

PASS · 48→96
Structured IQP
The diagonal-interaction pattern a physical lattice Hamiltonian induces, in the IQP form current fault-tolerant demonstrations use.
PASS · 48→96
Transversal Clifford blocks
Block-structured logical operation in the style of high-rate-code fault-tolerant practice; 96 = 6 × 16 blocks at the top rung.
PASS · 48→96
CNOT-ladder Pauli-rotation blocks
The Hamiltonian-evolution block a materials or chemistry client's decomposed operator produces.
PASS · 48→96
Mirror / uncompute
The checkpoint and verification structure a referee engagement itself uses; identity return checked exactly, per site.
PASS · 48→96
Trotterized dynamics (TFIM-class)
The time-evolution circuit class a material-dynamics workload induces, on lattice-local interaction graphs.

The controls refused, by design.Alongside the client-representative classes, the sealed study pre-registered adversarial controls: a literature-faithful dense random diagonal over the full register and an anti-compressible volume-law circuit. Both were refused by the pre-flight screen at every tested width — the concrete demonstration that eligibility is circuit and entanglement structure, not qubit count. Every capability claim rests exclusively on the client-representative classes.

Download the sealed capability package How the frontier moved

Start with the claim

What are you trying to validate?

The Referee is a routed service. The claim determines the evidence required, the appropriate reference path, and whether the requested validation is inside the measured envelope.

Recommended route

Circuit Referee

Establish what an eligible circuit should produce and where its outputs agree or diverge from an independent reference.

Client provides

QASM or circuit-generating specification, initial state, parameters, target observables, and the claim to test.

Referee returns

Predeclared protocol, reference state/properties where supported, checkpoint comparisons, bounded verdict, and reproducibility package.

Service portfolio

One referee discipline, multiple client problems.

Every module follows the same principle: define the claim first, freeze the test, compare against independent evidence, and state exactly what was and was not established.

DEMONSTRATED

Circuit Referee

Independent reference for eligible gate-model circuits and circuit segments.

  • probabilities and selected observables;
  • checkpoint divergence analysis;
  • supported, conditional, or unsupported classification.
Example: validate a diagonal Pauli-string block before integrating it into a larger workflow.
DEMONSTRATED

Equivalence Referee

Determine whether decomposition, optimization, basis translation, or routing changed the intended computation.

  • EQUIVALENT / NOT EQUIVALENT / INCONCLUSIVE;
  • phase-sensitive defects;
  • wire-map and parameter defects.
Example: compare a logical circuit with its transpiled hardware-ready form.
DEMONSTRATED

State Identity Audit

Test whether a plausible endpoint actually corresponds to the intended state or eigenspace.

  • fidelity and overlaps where tractable;
  • ground/excited-state content;
  • endpoint versus state identity.
Example: a VQE energy looks correct; determine whether the optimizer actually found the ground state.
DEMONSTRATED

Optimizer Path Audit

Inspect what happened between the starting state and the reported answer.

  • restart behavior;
  • local traps and regressions;
  • state movement versus endpoint improvement.
Example: determine whether optimization improved the state or destroyed a better starting point.
DEMONSTRATED

Mitigation Referee

Measure what error mitigation improved, what it worsened, and whether uncertainty remained credible.

  • MAE, RMSE, worst case, overshoot;
  • ZNE / selected PEC / readout workflows;
  • observable improvement separated from state claims.
Example: verify whether a mitigation method improves a dataset rather than only its mean headline metric.
DEMONSTRATED

Challenge-Response Validation

Introduce or specify a controlled defect and test whether the validation chain detects its consequence.

  • phase, parameter, ancilla or mapping perturbations;
  • predeclared expected consequences;
  • falsification-first grading.
Example: inject a known gate or phase defect into a trusted computation and challenge the referee to detect it.
STRUCTURE-SCREENED

Hardware Output Referee

Compare supplied QPU measurements with an eligible independent ideal reference.

  • basis-by-basis statistical consistency;
  • finite-shot versus systematic disagreement;
  • exact ideal reference when the submitted circuit passes structural feasibility screening.
This referees the computation, not T1/T2, pulses, cryogenics, fabrication, or the physical QPU as a device.
STRUCTURE-SCREENED

Hamiltonian Circuit-State Referee

Validate circuit-state consequences of structurally eligible Hamiltonian-derived constructions.

  • exact state and observable reference where eligible;
  • projected reference for specifically validated diagonal structures;
  • Hamiltonian→circuit equivalence remains a separately scoped claim layer.
Example: validate an eligible Hamiltonian-derived circuit before hardware execution.
STRUCTURE-SCREENED

Cross-Platform Referee

Use one accepted reference protocol to compare equivalent outputs from multiple QPUs or software stacks.

  • common claim and metric definitions;
  • same exact ideal reference when structurally eligible;
  • platform differences reported without choosing a vendor as truth.
The submitted circuit is screened before engagement to determine whether the common reference is supportable.

Structured exact coherent reference

Exact coherent validation is governed by circuit structure, not qubit count alone.

Two OFFICIAL, sealed programs establish the frontier. The first demonstrated exact, no-truncation coherent execution on structured circuits through 40 qubits, including a two-block 40-qubit case, GHZ-block and diagonal-ladder constructions, mirror/uncompute behavior, and cross-linked blocks. The second — sealed 2026-08-30 — extended that frontier through 96 qubits on five named structured lattice-local logical-circuit classes, on a pre-registered rung ladder of 48, 64, 80, and 96 qubits per class, with every rung independently cross-referenced against analytic, stabilizer, or dense statevector evidence.

What this establishes

Exact reference far beyond a dense-width ceiling

Structurally eligible circuits remain exact even at widths where a conventional dense reference is impossible in principle. Every rung of the 96-qubit structured-class ladder carried an independent cross-reference — analytic amplitude evaluation for diagonal classes, independent stabilizer simulation for Clifford classes, exact per-site identity return for mirror constructions, and dense statevector references per lattice region — with worst-case disagreement at the 10⁻¹³ level or better.

What protects the client

Pre-flight feasibility and explicit refusal — at both scales

In the 40-qubit program, a deliberately anti-compressible 32-qubit control returned RESOURCE_LIMIT exactly where the pre-flight screen predicted. The 96-qubit structured-class program pre-registered two adversarial control families — a dense random diagonal over the full register and a volume-law entangling circuit — and both were refused by the screen at every tested width, as required. Unsupported complexity is refused rather than silently approximated or extrapolated.

ReproducibilityBoth programs completed a full REPRODUCTION pass matching the OFFICIAL result byte-for-byte across the sealed evidence set — for the structured-class extension, every input circuit regenerated byte-identically from pre-registered seeds and all 94 evidence records matched. For client work, the relevant question is therefore not “How many qubits?” but “Can we provide the exact reference your circuit requires?”

Client intake

We determine the defensible reference route before accepting the validation.

Circuit width alone does not determine eligibility. IQ Intel pre-flights the submitted circuit and requested claim, then classifies the engagement without exposing internal execution architecture or substituting approximation for an exact-reference claim.

SUPPORTED

Exact reference available

The submitted circuit and requested evidence are inside a validated exact-reference route.

CONDITIONAL

Provisioning or scoped route required

The circuit remains structurally eligible, but the engagement requires appropriate provisioning or a specifically bounded validation route.

REFUSE

Outside the validated mechanism

The requested exact reference or claim cannot be supported within the validated envelope. The engagement is refused as RESOURCE_LIMIT or UNSUPPORTED rather than forced into a passing answer. Where the pre-flight cannot produce the evidence to scope the engagement at all, the intake classification is UNKNOWN — a screening outcome, not a graded verdict — and no engagement is accepted on it.

Official operating-envelope program

The boundary is structural, not a qubit-count cliff.

The completed Referee operating-envelope program executed 87 OFFICIAL instances across circuit families A–F plus stress suite X at widths from 8 through 24 qubits specifically to characterize the projected O(N) reference path. The study established a narrow, width-stable exact envelope and identified circuit structures that must be routed elsewhere. It is a routing study for one reference representation, not a qubit ceiling for the Referee service.

Validated projected O(N) envelope

Supported or conditional

  • Diagonal Pauli-string rotations on basis states: FULL-REF for p1 and pair-ZZ to approximately 1e−15 across tested widths.
  • Single-rotation-layer state preparation: exact under the frozen population-calibration projection.
  • Classical X/CX segments: conditional; exact only while every CX control is 1.
  • TFIM Trotter: exact for one step on the projected O(N) path.
Measured routing boundary

Outside the projected O(N) envelope

  • rotation composition beyond the measured single-step boundary;
  • CX/CZ applied to superposed states;
  • generic entanglement-on-superposition families;
  • swap in the current projected lowering;
  • rzz in the gate-only projected path.
Important routing distinctionCircuits requiring generic full-state treatment, entanglement generated from superposition, generic Hamiltonian reference, hardware-output reference, or cross-platform reference are not evaluated through the projected O(N) path. Where structurally eligible, they are routed to the separate exact coherent reference path. The projected-path boundary is therefore a routing boundary, not a limit of the Referee service.
ConstructionProjected O(N) verdictObserved boundaryClient interpretation
Diagonal Pauli-string rotation on basis stateFULL-REFWidth-stable, 8→24 testedEligible high-width structural reference within the frozen construction.
Single rotation state prepFULL-REFOne rotation layerEligible state-preparation segment.
Classical X/CXCONDITIONALCX controls must remain 1Eligibility screen required.
TFIM TrotterBOUNDARYDivergence begins at L02Route deeper cases to the exact coherent path when structurally eligible.
Entangling on superpositionUNSUPPORTEDL01Refuse projected-path certification.

Measured cause of failureAcross the official search grid, width, two-qubit density, connectivity, topology persistence, and parameter diversity did not move the first-divergence checkpoint. The measured boundary was dominated by operation semantics and composition structure rather than size.

Technical due diligence

Gate & operation coverage

Gate support is path- and context-dependent. The Referee screens complete circuit structure because an individually validated operation can cross a reference boundary when composed with other gates or applied to a superposed or entangled state.

View validated gate and operation coverage
Operation / familyExact coherent pathProjected O(N) pathValidated condition / routing note
XVALIDATEDVALIDATEDBasis-state and classical reversible behavior validated.
YVALIDATEDCONDITIONALSingle-application projected behavior validated; composition remains bounded.
HVALIDATEDROUTE: EXACTProjected semantics are not used as a conventional Hadamard full-state reference.
RX / RYVALIDATEDROUTE: SINGLE-LAYERSingle-rotation state preparation validated; repeated composition crosses the measured projected-path boundary.
RZVALIDATEDROUTE: EXACTUse exact coherent routing when conventional phase-sensitive state behavior is required.
CX / CNOTVALIDATEDROUTE: CONDITIONALProjected path is exact only under the measured control-state condition; entangling-on-superposition routes elsewhere.
CZVALIDATEDROUTE: EXACTConventional phase-entangling behavior is handled on the exact coherent path.
CCX / ToffoliVALIDATEDROUTE: DEPENDENTValidated against exact references and exercised inside complete algorithm constructions.
RZZVALIDATEDROUTE: EXACTConventional RZZ behavior is not certified through the projected gate-only path.
SWAPVALIDATEDROUTE: EXACTCurrent projected lowering does not preserve conventional SWAP semantics.
FSWAPVALIDATEDROUTE: MULTIPARTNative exchange behavior is evaluated independently from SWAP decomposition.
Diagonal Pauli-string rotationsVALIDATEDFULL-REFExact on tested basis-state constructions across the OFFICIAL projected-path envelope.
First-order TrotterVALIDATEDONE-STEP TFIMExact coherent route demonstrated through 64 layers; projected TFIM reference is bounded at its measured one-step condition.
Second-order Suzuki–TrotterVALIDATEDROUTE: EXACTExact coherent route demonstrated through 96 layers.

Gate support is not circuit support.Eligibility is determined from the complete submitted circuit and the requested validation claim, then routed to projected O(N), exact coherent, specialized protocol, or an explicit refusal outcome.

Demonstrated evidence

The service was built from failures as well as passes.

The validation lineage deliberately escalated from gate semantics to entanglement, complete algorithms, repeated dynamics, interacting systems, transformed circuits, hardware data, and mitigation claims.

State-level trap

A plausible energy did not identify the state.

In the retained H4 case, the reported energy was only about 0.56% from the exact ground-state energy while ground-state fidelity was approximately 8.6×10⁻13. The state was an excited eigenstate, so an energy-variance check also failed to expose the error.

Commercial implication

Endpoint correctness and state identity are separate claims.

The Referee can inspect state overlap and eigenspace content where tractable, rather than inferring success solely from an energy, probability, or other endpoint.

Referee protocol

The acceptance criteria are frozen before grading.

01 · Define

State the claim

Identify the circuit, inputs, requested evidence, tolerances, failure classes, and conditions that make the result inconclusive.

02 · Freeze

Lock the protocol

Hash inputs, references, software versions, seeds, parameters, mappings, and the protocol itself before grading.

03 · Route

Choose the defensible reference path

Projected O(N), exact coherent, specialized protocol, conditional scope, RESOURCE_LIMIT, or unsupported.

04 · Reference

Compute independent evidence

Generate the accepted reference state, properties, observables, checkpoints, or statistical expectations.

05 · Referee

Issue bounded findings

PASS / FAIL / INCONCLUSIVE / RESOURCE_LIMIT / UNSUPPORTED by criterion, with discrepancy analysis and explicit claim boundaries.

06 · Reproduce

Ship the evidence chain

Deliver machine-readable results, report, environment records, hashes, and a reproducibility package.

What the service does not claim

A trustworthy referee must know when not to certify.

Outside the accepted reference envelope

  • circuits whose required exact reference exceeds the pre-flight structural feasibility boundary;
  • unrestricted OpenQASM 3 classical/timing/pulse semantics;
  • analog or annealing systems without a specific protocol;
  • arbitrary full-state reconstruction from hardware samples;
  • claims that require evidence the agreed Referee route cannot independently produce.

Not physical-device certification

  • no T1/T2 certification;
  • no pulse-level or cryogenic validation;
  • no fabrication-quality certification;
  • no universal noise-source diagnosis;
  • no blanket certification of a QPU or quantum-advantage claim.

Refusal and reprovisioning are different outcomes.If a circuit remains structurally eligible but exceeds the currently provisioned reference envelope, it can be classified for reprovisioning rather than treated as fundamentally unsupported. If the requested claim lies outside the validated mechanism, the result remains UNSUPPORTED; if intake screening cannot produce the evidence to scope the engagement, the intake classification is UNKNOWN and no verdict is issued. No approximate certificate is substituted for an exact-reference claim.

Sealed evidence library

Go directly from a claim to the evidence behind it.

The public index separates the three completed Referee packages from the broader validation lineage. Where a public sealed artifact is available, the package link and SHA-256 are provided directly. Additional public artifacts can be added without changing the page structure.

Start here

Combined sealed evidence bundle

Twelve public packages in one download: the three client-style Referee programs (circuit equivalence, hardware output, mitigation), the algorithm and dynamics lineage (HHL, QPE, Grover, Trotter, Suzuki–Trotter, spin chains), the two envelope studies, and the structured logical-circuit classes capability package (exact coherent execution through 96 qubits on the named structured classes).

Download combined evidence bundle
NEW · OFFICIAL · SEALED · REPRODUCED

Structured Logical-Circuit Classes through 96 Qubits

Pre-registered rung ladder (48, 64, 80, 96 qubits) across five client-representative structured classes, each rung independently cross-referenced; two adversarial control families refused by the pre-flight screen at every tested width, as required.

ResultAll five classes PASS at every rung through the 96-qubit rung of each class; determinism bit-identical across dual executions; REPRODUCTION byte-for-byte from the sealed package.
Sealed capability packageAnnouncement
OFFICIAL · SEALED

Circuit Equivalence Referee

Blinded circuit transformations, including defects that preserved endpoint probabilities while changing coherent state.

Result26/26 classifications correct; 513 runs replayed byte-identically.
Sealed package
OFFICIAL · SEALED

Hardware Output Referee

Frozen synthetic degradations plus published IBM hardware measurements, with computational consistency separated from physical-device claims.

ResultAll frozen controls classified as predicted; published hardware case graded against the independent reference.
Sealed package
OFFICIAL · SEALED

Mitigation Referee

Published real-hardware ML-QEM versus digital-ZNE data reconstructed and graded point by point against an independent ideal reference.

ResultAverage improvement and local regressions reported separately; observable-level conclusions kept distinct from state-level claims.
Sealed package
PUBLIC STUDY

VQE State-Identity Audit

A near-ground-state energy was shown not to establish the intended ground state.

EstablishedEndpoint metrics and state identity are separate validation claims.
Public study
PUBLIC STUDY

Error-Mitigation Referee Matrix

A sealed 35-cell program used preregistered predictions and truth-blind grading, including results that falsified most prior expectations.

EstablishedThe Referee process can invalidate its own predictions instead of manufacturing confirmation.
Public study
OFFICIAL · SEALED

HHL Challenge-Response

Complete non-variational algorithm validation with intermediate entangled checkpoints, controlled rotation, uncomputation, and solution-state comparison.

EstablishedAn initial INCONCLUSIVE result exposed a missing coherent representation; the revised coherent route then satisfied frozen checkpoint references.
Sealed packageReference provenance
OFFICIAL · SEALED

Quantum Phase Estimation

Exact and finite-resolution phase cases plus an external QASMBench PEA circuit.

EstablishedControlled phase accumulation, inverse-QFT interference, finite-resolution behavior, and entanglement checks.
Sealed packageReference provenance
OFFICIAL · SEALED

Grover Search

Published and internal cases exercising oracle phase marking, diffusion, amplitude amplification, and native CCX.

EstablishedComplete algorithm behavior including phase-sensitive correctness not reducible to final probabilities alone.
Sealed packageReference provenance
OFFICIAL · SEALED

Trotter & Suzuki–Trotter Dynamics

Repeated coherent dynamics beyond the projected-path one-step boundary.

EstablishedFirst-order Trotter through 64 layers and second-order Suzuki–Trotter through 96 layers, with expected convergence behavior.
Trotter packageSuzuki–Trotter package
OFFICIAL · SEALED

XY / Heisenberg Spin Chains

Interacting-system trajectories covering transport, conservation, relative phase, reduced states, correlations, and entanglement.

EstablishedThe coherent route extends beyond isolated algorithm demonstrations into repeated interacting-system dynamics.
Sealed package
OFFICIAL · SEALED

Projected-Property Validation

Six frozen rungs from N=4 through N=24 characterized the projected O(N) semantics and exposed latent boundaries.

EstablishedDeterministic projected-path scaling with explicit semantic limits rather than extrapolation.
Sealed packageMeasured envelope
OFFICIAL · SEALED

87-Instance Referee Envelope

Families A–F plus stress suite X at N=8 through N=24 isolated the projected path’s width-stable exact subset and structural routing boundaries.

EstablishedThe N=24 figure is a study range for the projected representation, not a Referee service ceiling.
Public summary packageOperating-envelope results
OFFICIAL · SEALED

Structured Exact-Coherent Frontier (40-Qubit Program)

Structured circuits through 40 qubits, including a two-block 40-qubit case, GHZ blocks, diagonal ladders, mirror/uncompute, and cross-linked blocks. Since extended through 96 qubits on the structured logical-circuit classes above.

EstablishedExact-reference eligibility is governed by evolving circuit/entanglement complexity rather than width alone; an anti-compressible control was refused where pre-flight predicted.
Frontier summary
SEPARATE VALIDATION LINE

NMC811 Dataset IV&V

Trajectory, mirrored behavior, recomputation integrity, null controls, and literature-grounded validation criteria for materials datasets.

ScopeMaterials output validation is separate from gate-state equivalence and uses its own physical/structural protocol.
Request public evidence set
SEPARATE VALIDATION LINE

NdFeB / MagNet Dataset IV&V

Manufacturing-trajectory validation with stage boundaries, order behavior, recomputation, and published physical constraints.

ScopeIndependent validation of generated materials trajectories rather than circuit-state equivalence.
Request public evidence set

IntegrityPublic package links should resolve to the exact sealed artifacts corresponding to the SHA-256 shown here. The page never substitutes a later rebuild under an earlier hash.

Reference provenance

Published sources plus independently generated ground truth.

External sources establish provenance for selected circuits and hardware datasets. Numerical reference values were independently generated wherever tractable rather than copied from the published results.

HHL
H. Y. Morrell, A. Zaman, H. Y. Wong, Step-by-Step HHL Algorithm Walkthrough to Enhance the Understanding of Critical Quantum Computing Concepts, arXiv:2108.09004.
QPE and Grover
PNNL QASMBench; A. Li, S. Stein, S. Krishnamoorthy, J. Ang, QASMBench: A Low-Level Quantum Benchmark Suite for NISQ Evaluation and Simulation, ACM Transactions on Quantum Computing 4(2), 2023; Nielsen & Chuang for textbook construction references.
Trotter and Suzuki–Trotter
H. F. Trotter (1959); M. Suzuki (1976, 1990). Circuit and dense-Hamiltonian references were generated independently from frozen internal specifications.
Hardware Output Referee
Qiskit Community textbook repetition-code data, including published ibmq_16_melbourne raw results.
Mitigation Referee
H. Liao et al., Machine Learning for Practical Quantum Error Mitigation, Nature Machine Intelligence 6, 1478–1486 (2024), with published Qiskit Community ML-QEM artifacts.